JPS5990067A - 論理回路試験用パタ−ン発生装置 - Google Patents

論理回路試験用パタ−ン発生装置

Info

Publication number
JPS5990067A
JPS5990067A JP57200698A JP20069882A JPS5990067A JP S5990067 A JPS5990067 A JP S5990067A JP 57200698 A JP57200698 A JP 57200698A JP 20069882 A JP20069882 A JP 20069882A JP S5990067 A JPS5990067 A JP S5990067A
Authority
JP
Japan
Prior art keywords
test pattern
data
address
memory
memories
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57200698A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0480350B2 (en]
Inventor
Masao Shimizu
雅男 清水
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Takeda Riken Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp, Takeda Riken Industries Co Ltd filed Critical Advantest Corp
Priority to JP57200698A priority Critical patent/JPS5990067A/ja
Priority to US06/551,429 priority patent/US4586181A/en
Publication of JPS5990067A publication Critical patent/JPS5990067A/ja
Publication of JPH0480350B2 publication Critical patent/JPH0480350B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31919—Storing and outputting test patterns
    • G01R31/31921—Storing and outputting test patterns using compression techniques, e.g. patterns sequencer

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
JP57200698A 1982-11-15 1982-11-15 論理回路試験用パタ−ン発生装置 Granted JPS5990067A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP57200698A JPS5990067A (ja) 1982-11-15 1982-11-15 論理回路試験用パタ−ン発生装置
US06/551,429 US4586181A (en) 1982-11-15 1983-11-14 Test pattern generating apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57200698A JPS5990067A (ja) 1982-11-15 1982-11-15 論理回路試験用パタ−ン発生装置

Publications (2)

Publication Number Publication Date
JPS5990067A true JPS5990067A (ja) 1984-05-24
JPH0480350B2 JPH0480350B2 (en]) 1992-12-18

Family

ID=16428745

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57200698A Granted JPS5990067A (ja) 1982-11-15 1982-11-15 論理回路試験用パタ−ン発生装置

Country Status (2)

Country Link
US (1) US4586181A (en])
JP (1) JPS5990067A (en])

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3700251A1 (de) * 1986-01-07 1987-07-09 Hitachi Ltd Verfahren und vorrichtung zur diagnose logischer schaltungen
JPS6336163A (ja) * 1986-07-30 1988-02-16 Hitachi Ltd Ｉｃ試験装置
JP2003057319A (ja) * 2001-08-10 2003-02-26 Advantest Corp 半導体試験装置
US7185295B2 (en) 2000-06-03 2007-02-27 Hyunju Park Chip design verifying and chip testing apparatus and method

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3513551A1 (de) * 1985-04-16 1986-10-16 Wandel & Goltermann Gmbh & Co, 7412 Eningen Digitaler wortgenerator zur automatischen erzeugung periodischer dauerzeichen aus n-bit-woertern aller wortgewichte und deren permutationen
JPS62195572A (ja) * 1986-02-21 1987-08-28 Mitsubishi Electric Corp 半導体テスト装置
US5050170A (en) * 1986-09-04 1991-09-17 Schlumberger Technologies, Inc. Apparatus for combining signals from first and second information processing elements
US4730318A (en) * 1986-11-24 1988-03-08 International Business Machines Corporation Modular organized storage tester
US5384912A (en) * 1987-10-30 1995-01-24 New Microtime Inc. Real time video image processing system
EP0314250A3 (en) * 1987-10-30 1992-03-04 New Microtime Inc. Video digital analog signal processing and display
US4875210A (en) * 1988-01-06 1989-10-17 Teradyne, Inc. Automatic circuit tester control system
US5321700A (en) * 1989-10-11 1994-06-14 Teradyne, Inc. High speed timing generator
US5073891A (en) * 1990-02-14 1991-12-17 Intel Corporation Method and apparatus for testing memory
CA2092291A1 (en) * 1990-09-24 1992-03-25 Steven G. Morton Sonet signal generating apparatus and method
US5195097A (en) * 1990-10-19 1993-03-16 International Business Machines Corporation High speed tester
DE19781563C2 (de) * 1996-11-29 2001-02-15 Advantest Corp Mustergenerator
US5872797A (en) * 1996-12-02 1999-02-16 International Business Machines Corporation Burn-in signal pattern generator
US6061815A (en) * 1996-12-09 2000-05-09 Schlumberger Technologies, Inc. Programming utility register to generate addresses in algorithmic pattern generator
JPH10319095A (ja) * 1997-05-22 1998-12-04 Mitsubishi Electric Corp 半導体テスト装置
DE10034854A1 (de) * 2000-07-18 2002-02-14 Infineon Technologies Ag Verfahren und Vorrichtung zur Erzeugung digitaler Signalmuster

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4313200A (en) * 1978-08-28 1982-01-26 Takeda Riken Kogyo Kabushikikaisha Logic test system permitting test pattern changes without dummy cycles
JPS5585265A (en) * 1978-12-23 1980-06-27 Toshiba Corp Function test evaluation device for integrated circuit
JPS5914840B2 (ja) * 1979-10-19 1984-04-06 日本電信電話株式会社 半導体メモリ試験用パタ−ン発生装置
US4450560A (en) * 1981-10-09 1984-05-22 Teradyne, Inc. Tester for LSI devices and memory devices

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3700251A1 (de) * 1986-01-07 1987-07-09 Hitachi Ltd Verfahren und vorrichtung zur diagnose logischer schaltungen
JPS6336163A (ja) * 1986-07-30 1988-02-16 Hitachi Ltd Ｉｃ試験装置
US7185295B2 (en) 2000-06-03 2007-02-27 Hyunju Park Chip design verifying and chip testing apparatus and method
US7571400B2 (en) 2000-06-03 2009-08-04 Hyun-Ju Park Chip design verifying and chip testing apparatus and method
JP2003057319A (ja) * 2001-08-10 2003-02-26 Advantest Corp 半導体試験装置

Also Published As

Publication number Publication date
JPH0480350B2 (en]) 1992-12-18
US4586181A (en) 1986-04-29

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